The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits by Jespers, Paul;

Hosszú leírás:

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In ""The g_m/I_D Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits"", we compare the semi-empirical to the compact model approach. Small numbers of parameters make the compact model attractive for the model paves the way towards analytic expressions unaffordable otherwise. The E.K.V model is a good candidate, but when it comes to short channel devices, compact models are either inaccurate or loose straightforwardness. Because sizing requires basically a reliable large signal representation of MOS transistors, we investigate the potential of the E.K.V model when its parameters are supposed to be bias dependent. The model-driven and semi-empirical methods are compared considering the Intrinsic Gain Stage and a few more complex circuits. A series of MATLAB files found on extras-springer.com allow redoing the tests.

This book provides a comprehensive overview of design methodologies for Analog Circuits, and includes a MATLAB dedicated toolbox. The MATLAB toolbox offers the possibility of performing virtual hands-on experiments related to MOS transistor physics as well as finding currents and transistor sizes for well-known CMOS circuits. The book’s objective is to suggest straightforward methodologies at the earliest possible design stage and find currents and sizes very close to optimality. The methodology takes advantage of compact MOS models while following classical design procedures. This is also the first 'book' to present the gm/ID synthesis methodology to which an increasing number of papers refer. Finally, the users’ guide, described in the annex, should enable the reader to run their own tests.

Tartalomjegyzék:

Preface. Notations. Chapter 1. Sizing the Intrinsic Gain Stage. Chapter 2. The Charge Sheet Model revisited. Chapter 3. Graphical interpretation of the Charge Sheet Model. Chapter 4. Compact modeling. Chapter 5. The real transistor. Chapter 6. The real Intrinsic Gain Stage. Chapter 7. The common gate configuration. Chapter 8. Sizing the Miller Op. Amp. Annex 1. How to utilize the C.D. ROM data. Annex 2. The MATLAB toolbox. Annex 3. Temperature and Mismatch, from C.S.M. to E.K.V. Annex 4. E.K.V. intrinsic capacitance models. Bibliography. Index.