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  • Noise-Shaping All-Digital Phase-Locked Loops: Modeling, Simulation, Analysis and Design

    Noise-Shaping All-Digital Phase-Locked Loops by Brandonisio, Francesco; Kennedy, Michael Peter;

    Modeling, Simulation, Analysis and Design

    Series: Analog Circuits and Signal Processing;

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      • Publisher's listprice EUR 106.99
      • The price is estimated because at the time of ordering we do not know what conversion rates will apply to HUF / product currency when the book arrives. In case HUF is weaker, the price increases slightly, in case HUF is stronger, the price goes lower slightly.

        44 374 Ft (42 261 Ft + 5% VAT)
      • Discount 20% (cc. 8 875 Ft off)
      • Discounted price 35 499 Ft (33 809 Ft + 5% VAT)

    44 374 Ft

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    Delivery time is estimated on our previous experiences. We give estimations only, because we order from outside Hungary, and the delivery time mainly depends on how quickly the publisher supplies the book. Faster or slower deliveries both happen, but we do our best to supply as quickly as possible.

    Product details:

    • Edition number 2014
    • Publisher Springer International Publishing
    • Date of Publication 8 January 2014
    • Number of Volumes 1 pieces, Book

    • ISBN 9783319036588
    • Binding Hardback
    • No. of pages177 pages
    • Size 235x155 mm
    • Weight 4144 g
    • Language English
    • Illustrations XIII, 177 p. 145 illus., 79 illus. in color. Illustrations, black & white
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    Long description:

    This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

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    Table of Contents:

    Introduction.- Phase Digitization in All-Digital PLLs.- A Unifying Framework for TDC Architectures.- Analytical Predictions of Phase Noise in ADPLLs.- Advantages of Noise Shaping and Dither.- Efficient Modeling and Simulation of Accumulator-Based ADPLLs.- Modelling and Estimating Phase Noise with Matlab.

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