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  • Networks-on-Chip: From Implementations to Programming Paradigms

    Networks-on-Chip by Ma, Sheng; Huang, Libo; Lai, Mingche; Shi, Wei;

    From Implementations to Programming Paradigms

      • GET 20% OFF

      • The discount is only available for 'Alert of Favourite Topics' newsletter recipients.
      • Publisher's listprice EUR 49.95
      • The price is estimated because at the time of ordering we do not know what conversion rates will apply to HUF / product currency when the book arrives. In case HUF is weaker, the price increases slightly, in case HUF is stronger, the price goes lower slightly.

        20 716 Ft (19 730 Ft + 5% VAT)
      • Discount 20% (cc. 4 143 Ft off)
      • Discounted price 16 573 Ft (15 784 Ft + 5% VAT)

    20 716 Ft

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    Availability

    printed on demand

    Why don't you give exact delivery time?

    Delivery time is estimated on our previous experiences. We give estimations only, because we order from outside Hungary, and the delivery time mainly depends on how quickly the publisher supplies the book. Faster or slower deliveries both happen, but we do our best to supply as quickly as possible.

    Long description:

    Networks-on-Chip: From Implementations to Programming Paradigms provides a thorough and bottom-up exploration of the whole NoC design space in a coherent and uniform fashion, from low-level router, buffer and topology implementations, to routing and flow control schemes, to co-optimizations of NoC and high-level programming paradigms.

    This textbook is intended for an advanced course on computer architecture, suitable for graduate students or senior undergrads who want to specialize in the area of computer architecture and Networks-on-Chip. It is also intended for practitioners in the industry in the area of microprocessor design, especially the many-core processor design with a network-on-chip. Graduates can learn many practical and theoretical lessons from this course, and also can be motivated to delve further into the ideas and designs proposed in this book. Industrial engineers can refer to this book toï¿1⁄2make practical tradeoffs as well. Graduates and engineers who focus on off-chip network design can also refer to this book to achieve deadlock-free routing algorithm designs.

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    Table of Contents:

    1 Introduction

    Part One: Logic Implementations

    2 A Single-cycle Router with Wing Channel

    3 Dynamic VC Routers with Congestion Awareness

    4 A NoC Topology with Virtual Bus

    Part Two: Routing and Flow Control

    5 Routing Algorithms for Workload Consolidation

    6 Flow Control for Fully Adaptive Routing

    7 Deadlock-free Flow Control for Torus NoCs

    8 Delay Analysis based on the M/G/1/N Queuing Model

    Part Three: Programming Paradigms

    9 Support Cache-coherent Collective Communication

    10 Optimizations to Exploit Communication Locality

    11 Customizations for MPI Primitives

    12 Conclusions and Future Work

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    Networks-on-Chip: From Implementations to Programming Paradigms

    Networks-on-Chip: From Implementations to Programming Paradigms

    Ma, Sheng; Huang, Libo; Lai, Mingche; Shi, Wei

    20 716 HUF

    16 573 HUF

    Networks-on-Chip: From Implementations to Programming Paradigms

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    Gottesfeld, Jeff

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    Networks-on-Chip: From Implementations to Programming Paradigms

    Verhaltenstherapie: Das Lehrbuch für Medizin und Psychologie

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    39 007 HUF

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