Networks-on-Chip
From Implementations to Programming Paradigms
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Product details:
- Publisher Elsevier Science
- Date of Publication 8 December 2014
- ISBN 9780128009796
- Binding Paperback
- No. of pages382 pages
- Size 234x190 mm
- Weight 810 g
- Language English 0
Categories
Long description:
Networks-on-Chip: From Implementations to Programming Paradigms provides a thorough and bottom-up exploration of the whole NoC design space in a coherent and uniform fashion, from low-level router, buffer and topology implementations, to routing and flow control schemes, to co-optimizations of NoC and high-level programming paradigms.
This textbook is intended for an advanced course on computer architecture, suitable for graduate students or senior undergrads who want to specialize in the area of computer architecture and Networks-on-Chip. It is also intended for practitioners in the industry in the area of microprocessor design, especially the many-core processor design with a network-on-chip. Graduates can learn many practical and theoretical lessons from this course, and also can be motivated to delve further into the ideas and designs proposed in this book. Industrial engineers can refer to this book toï¿1⁄2make practical tradeoffs as well. Graduates and engineers who focus on off-chip network design can also refer to this book to achieve deadlock-free routing algorithm designs.
MoreTable of Contents:
1 Introduction
Part One: Logic Implementations
2 A Single-cycle Router with Wing Channel
3 Dynamic VC Routers with Congestion Awareness
4 A NoC Topology with Virtual Bus
Part Two: Routing and Flow Control
5 Routing Algorithms for Workload Consolidation
6 Flow Control for Fully Adaptive Routing
7 Deadlock-free Flow Control for Torus NoCs
8 Delay Analysis based on the M/G/1/N Queuing Model
Part Three: Programming Paradigms
9 Support Cache-coherent Collective Communication
10 Optimizations to Exploit Communication Locality
11 Customizations for MPI Primitives
12 Conclusions and Future Work
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