Power-Efficient High-Speed Parallel-Sampling ADCs for Broadband Multi-carrier Systems
Series: Analog Circuits and Signal Processing;
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44 374 Ft
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Product details:
- Edition number Softcover reprint of the original 1st ed. 2015
- Publisher Springer International Publishing
- Date of Publication 9 October 2016
- Number of Volumes 1 pieces, Previously published in hardcover
- ISBN 9783319368917
- Binding Paperback
- See also 9783319176796
- No. of pages115 pages
- Size 235x155 mm
- Weight 2058 g
- Language English
- Illustrations IX, 115 p. 83 illus., 48 illus. in color. Illustrations, black & white 0
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Long description:
This book addresses the challenges of designing high performance analog-to-digital converters (ADCs) based on the “smart data converters” concept, which implies context awareness, on-chip intelligence and adaptation. Readers will learn to exploit various information either a-priori or a-posteriori (obtained from devices, signals, applications or the ambient situations, etc.) for circuit and architecture optimization during the design phase or adaptation during operation, to enhance data converters performance, flexibility, robustness and power-efficiency. The authors focus on exploiting the a-priori knowledge of the system/application to develop enhancement techniques for ADCs, with particular emphasis on improving the power efficiency of high-speed and high-resolution ADCs for broadband multi-carrier systems.
MoreTable of Contents:
Introduction.- Enhancing ADC performance by exploiting signal properties.- Parallel-sampling ADC architecture for mult-carrier signals.- Implementations of the parallel-sampling ADC architecture.- Conclusions and recommendations.
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