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  • Network Processors: Architectures, Protocols and Platforms

    Network Processors by Lekkas, Panos;

    Architectures, Protocols and Platforms

    Series: ELECTRONICS;

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      • Publisher's listprice GBP 41.99
      • The price is estimated because at the time of ordering we do not know what conversion rates will apply to HUF / product currency when the book arrives. In case HUF is weaker, the price increases slightly, in case HUF is stronger, the price goes lower slightly.

        20 722 Ft (19 735 Ft + 5% VAT)
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      • Discounted price 18 650 Ft (17 762 Ft + 5% VAT)

    20 722 Ft

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    Availability

    Estimated delivery time: In stock at the publisher, but not at Prospero's office. Delivery time approx. 3-5 weeks.
    Not in stock at Prospero.

    Why don't you give exact delivery time?

    Delivery time is estimated on our previous experiences. We give estimations only, because we order from outside Hungary, and the delivery time mainly depends on how quickly the publisher supplies the book. Faster or slower deliveries both happen, but we do our best to supply as quickly as possible.

    Product details:

    • Publisher McGraw-Hill Education
    • Date of Publication 16 August 2003

    • ISBN 9780071409865
    • Binding Hardback
    • No. of pages456 pages
    • Size 241x198x39 mm
    • Weight 955 g
    • Language English
    • 0

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    Short description:

    NETWORK PROCESSORS "UNDER THE HOOD"

    Written with insight by a leading telecommunications chip industry veteran, Network Processor: Architectures, Protocols, and Platforms delivers an eye-opening "whole picture" look at the revolution in high-speed network equipment and provides a unique top-to-bottom review of more than 20 network processing platforms (including NP chips and coprocessors). With Network Processors, you will:

    * Get a clear detailed look at all NPs commercially available through mid-2003
    * Learn how and why NP architectures differ from classical CPUs
    * Plan for a new generation of chips used in routers and switches
    * Understand the specific design trade-offs entailed by each new NP
    * Understand how to evaluate platforms and architectures while being cognizant of inevitable market forces affecting NP vendors
    * Understand and prepare for the issues associated with rapidly developing reusable networking software for these new processors
    * Save time with a handy down-to-earth reference that, unlike other books on the subject, does not limit itself to only one company's approach or engage in abstract scholarly discussions that are not useful for an engineer's or manager's everyday reality
    * Get wide view coverage of this new technology followed by directions for deeper, more specialized implementation based on your own needs

    A PRACTICAL EDUCATION IN NETWORK PROCESSORS:
    * Why Network Processors?
    * IBM PowerNP(tm) Architecture
    * Intel IXA(tm) Architecture
    * AMCC nP(tm) Family of Network Processors
    * Agere PayloadPlus(R) Family of Network Processors
    * Motorola C-Port(R) Family of Network Processors
    * Other NPU Architectures
    * Alternatives to NPUs: Net ASICs & Designing with IP Cores
    * Switch Fabrics
    * Searcg Engines and Content-Addressable Memory (CAM)
    * Classification Processors
    * Traffic Managers
    * Storage Coprocessors and TCP Offload Engines
    * Security Coprocessors
    * Systems Engineering and Software Development Issues

    A MUST READ FOR:
    * Hardware engineers who develop networking equipment
    * Softwre engineers who code network software
    * Communications chip designers
    * Systems Architects or integrators
    * Managers who need the facts
    * Consultants

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    Long description:

    Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product.


    Explains how network processors work and provides detailed information on all major commercial architectures, from features to design considerations


    Network processing units (NPUs) will be the occasion of sweeping changes in the network hardware industry over the next few years. This new breed of microchip impacts chip designers like Intel, equipment vendors like Cisco, application developers like IBM and Morotola, and an army of software engineers who spent the last decade working on protocols and network management solutions.A thoroughly practical dissection of the early NPU market, this designer's guide explains how network processors work and provides detailed information on all major commercial architectures, from features to design considerations. Comparative tables are a rich source of cross-industry info. Coverage includes traffic managers, classification chips, content-addressable memories, switch fabrics, security accelerators, storage coprocessors and NetASICs.

    Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product.


    Explains how network processors work and provides detailed information on all major commercial architectures, from features to design considerations


    Network processing units (NPUs) will be the occasion of sweeping changes in the network hardware industry over the next few years. This new breed of microchip impacts chip designers like Intel, equipment vendors like Cisco, application developers like IBM and Morotola, and an army of software engineers who spent the last decade working on protocols and network management solutions.A thoroughly practical dissection of the early NPU market, this designer's guide explains how network processors work and provides detailed information on all major commercial architectures, from features to design considerations. Comparative tables are a rich source of cross-industry info. Coverage includes traffic managers, classification chips, content-addressable memories, switch fabrics, security accelerators, storage coprocessors and NetASICs.

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    Table of Contents:

    PART 1: FUNDAMENTALS

    Chapter 1: The Evolution of Network Technology: Distributed Computing and the Convergence of Networks

    Chapter 2: Network Processors: Justification

    Chapter 3: Packet Processing

    PART 2: NETWORK PROCESSOR ARCHITECTURE

    Chapter 4: IBM PowerNP(tm)

    Chapter 5: Intel IXA(tm) Network Processors

    Chapter 6: AMCC nP(tm) Family of Network Processors

    Chapter 7: Agere PayloadPlus(r) Family of Network Processors

    Chapter 8: Motorola's C-Port(tm) Family of Network Processors

    Chapter 9: Other NPU Architectures

    Chapter 10: Alternative Approaches to Network Processing: Net ASICs and Designing with IP Cores

    PART 3: PERIPHERAL CHIPS SUPPORTING NETWORK PROCESSORS: STORAGE PROCESSORS, CLASSIFICATION PROCESSORS, SEARCH ENGINES, SWITCH FABRICS, AND TRAFFIC MANAGERS

    Chapter 11: Storage Network Processors (SNPs)

    Chapter 12: Search Engines

    Chapter 13: Classification Processors

    Chapter 14: Switch Fabrics

    Chapter 15: Traffic Managers

    PART 4: PUTTING EVERYTHING TOGETHER

    Chapter 16: Systems Engineering Issues

    PART 5: SECURITY COPROCESSORS

    Chapter 17: Security Coprocessors

    LIST OF ACRONYMS

    APPENDIX I: OVERVIEW OF NETWORK-PROCESSOR PRODUCTS AND PLATFORMS

    APPENDIX II: TYPICAL TRAFFIC LOAD (in Millions of Packets per Second) CORRESPONDENCE AT VARIOUS LINK SPEEDS AND PACKET SIZES

    APPENDIX III: STANDARDIZATION EFFORTS IN NETWORK PROCESSING

    INDEX

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