• Contact

  • Newsletter

  • About us

  • Delivery options

  • Prospero Book Market Podcast

  • Embedded DSP Processor Design: Application Specific Instruction Set Processors

    Embedded DSP Processor Design by Liu, Dake;

    Application Specific Instruction Set Processors

    Series: Systems on Silicon; 2;

      • GET 10% OFF

      • The discount is only available for 'Alert of Favourite Topics' newsletter recipients.
      • Publisher's listprice EUR 78.95
      • The price is estimated because at the time of ordering we do not know what conversion rates will apply to HUF / product currency when the book arrives. In case HUF is weaker, the price increases slightly, in case HUF is stronger, the price goes lower slightly.

        32 744 Ft (31 185 Ft + 5% VAT)
      • Discount 10% (cc. 3 274 Ft off)
      • Discounted price 29 470 Ft (28 067 Ft + 5% VAT)

    32 744 Ft

    db

    Availability

    printed on demand

    Why don't you give exact delivery time?

    Delivery time is estimated on our previous experiences. We give estimations only, because we order from outside Hungary, and the delivery time mainly depends on how quickly the publisher supplies the book. Faster or slower deliveries both happen, but we do our best to supply as quickly as possible.

    Product details:

    • Publisher Elsevier Science
    • Date of Publication 9 July 2008

    • ISBN 9780123741233
    • Binding Hardback
    • No. of pages808 pages
    • Size 234x190 mm
    • Weight 1750 g
    • Language English
    • 0

    Categories

    Long description:

    This book provides design methods for Digital Signal Processors and Application Specific Instruction set Processors, based on the author's extensive, industrial design experience. Top-down and bottom-up design methodologies are presented, providing valuable guidance for both students and practicing design engineers.

    Coverage includes design of internal-external data types, application specific instruction sets, micro architectures, including designs for datapath and control path, as well as memory sub systems. Integration and verification of a DSP-ASIP processor are discussed and reinforced with extensive examples.

    More

    Table of Contents:

    Introduction to DSP and CPU; Finite length DSP; Architecture and Micro architecture design; Instruction set design ? part I; Instruction set design ? part II; ALU and Register file (RF); MAC (Multiplication and accumulation unit); Memory sub system and addressing unit; Control path; Design of tools for firmware programmers; Firmware design; Peripheral of DSP cores and processors; Accelerators; Advanced architecture ILP (Instruction level parallelism); Advanced architecture (On Chip multiple DSP cores); Design for integration; Review of the design flow and functional verification

    More
    0