Computer Arithmetic
Algorithms and Hardware Designs
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Product details:
- Publisher Oxford University Press
- Date of Publication 28 October 1999
- ISBN 9780195125832
- Binding Hardback
- No. of pages512 pages
- Size 234x186x27 mm
- Weight 1072 g
- Language English
- Illustrations numerous line figures 0
Categories
Short description:
This is a textbook for senior/graduate level courses in departments of computer science and electrical and computer engineering. The course is commonly called Computer Arithmetic, a sub-field of digital computer organization. The book deals with the hardware realization of arithmetic functions to support various computer architectures, as well as arithmetic algorithms for firmware or software implementations. A major thrust of digital computer arithmetic is the design of hardware
algorithms and circuits to enhance the speed of numeric operations. Thus much of what is presented in this book complements the architectural and algorithmic speedup techniques studied in the context of high performance computer architecture and parallel processing.
Long description:
The field of digital computer architecture has grown explosively in the past two decades. Through a steady stream of experimental research, tool-building efforts, and theoretical studies, the design of an instruction-set architecture has been transformed into one of the most quantitative branches of computer technology. However, this explosive growth has led to unprecedented harware complexity and almost intolerable development costs. The challenge faxing current and future
computer designers is to institute simplicity where we now have complexity; to use fundamental theories being developed in this area to gain performance and ease-of-use benefits from simpler circuits; to understand the interplay between technological capabilities/limitations and sound architectural
decisions. Computer arithmetic plays a key role in the computer designers' quest for user-friendliness, compactness, simplicity, high performance, low cost, and low power. Parhami's Computer Architecture emphasizes both the underlying theory and actual hardware designs. and links computer arithmetic to other subfields of computing. It is the first computer arithmetic book to cover all topics important for a balanced and complete view of the field. IT will be accompanied by an
instructor's manual, with problem solutions and enlarged versions of the figures/charts, suitable for reproduction as transparencies. This is a textbook for senior/graduate level courses in departments of computer science and electrical & computer engineering. The course is commonly called Computer Arithmetic.
Students wishing to enroll will usually have taken courses in computer organization and advanced digital design before enrolling. Computer Arithmetic is a sub-field of digital computer organization. It deals with the hardware realization of arithmetic functions to support various computer architectures, as well as arithmetic algorithms for firmware or software implementations. A major thrust of digital computer arithmetic is the design of hardware algorithms and circuits to enhance the speed of
numeric operations. Thus much of what is presented in this book complements the architectural and algorithmic speedup techniques studied in the context of high performance computer architecture and parallel processing.
Table of Contents:
Preface
Part I Number Representation
Numbers and Arithmetic
What is computer arithmetic?
A Motivating Example
Numbers and their encodings
Fixed-radix positional number systems
Number radix conversion
Classes of number representation
Problems
References
Representing Signed Numbers
Signed-magnitude representation
Biased representations
Complement representations
Two'- and one's-complement numbers
Direct and indirect signed arithmetic
Using signed positions or signed digits
Problems
References
Redundant Number Systems
Coping with the carry problem
Redundancy in computer arithmetic
Digit sets and digit-set conversions
Generalized signed-digit numbers
Carry-free addition algorithms
Conversions and support functions
Problems
References
Residue Number Systems
RNS representation and arithmetic
Choosing the RNS moduli
Encoding and decoding of numbers
Difficult RNS arithmetic operations
Redundant RNS representations
Limits of fast arithmetic in RNS
Problems
References
Part II Addition/Subtraction
Basic Addition and Counting
Bit-serial and ripple-carry adders
Conditions and execution
Analysis of carry propagation
Carry completion detection
Addition of a constant: counters
Manchester carry chains and adders
Problems
References
Carry-Lookahead Adders
Unrolling the carry recurrence
Carry-lookahead adder design
Ling adder and related designs
Carry determination as prefix computation
Alternative parallel prefix networks
VLSI implementation aspects
Problems
References
Variations in Fast Adders
Simple carry-skip adders
Multi-level carry-skip adders
Carry-select adders
Conditional-sum adder
Hybrid adder designs
Optimizations in fast adders
Problems
References
Multi-Operand Addition
Using two-operand adders
Carry-save adders
Wallace and Dadda trees
Parallel counters
Generalized parallel counters
Adding multiple signed numbers
Problems
References
Part III Multiplication
Basic Multiplication Schemes
Shift/add multiplication algorithms
Programmed multiplication
Basic hardware multipliers
Multiplication of signed numbers
Multiplication by constants
Preview of fast multipliers
Problems
References
High-Radix Multipliers
Radix-4 multiplication
Modified Booth's recoding
Using carry-save adders
Radix-8 and radix-16 multipliers
Twin-beat multipliers
VLSI layout considerations
Problems
References
Tree and Array Multipliers
Full tree multipliers
Alternative reduction tree
Tree multipliers for signed numbers
Partial tree multipliers
Array multipliers
Pipelined tree and array multipliers
Problems
References
Variations in Multipliers
Divide-and-conquer designs
Additive multiply modules
Bit-serial multipliers
Modular multipliers
The special case of squaring
Combined multiply-add units
Problems
References
Part IV Division
Basic Division Schemes
Shift/subtract division algorithms
Programmed division
Restoring hardware dividers
Non-restoring and signed division
Division by constants
Preview of fast dividers
Problems
References
High-Radix Dividers
Radix-4 division
Radix-2 SRT division
Using carry-save adders
Choosing the quotient digits
Radix-4 SRT division
General high-radix dividers
Problems
References
Variations in Dividers
The quotient-digit selection problem
Hardware for quotient-digit selection
Division with pre-scaling
Modular dividers
Array dividers
Combinded multiply/divide units
Problems
References
Division by Convergence
General functional iteration
Division by repeated multiplications
Division by reciprocation
Speedup of convergence division
Hardware implementation
Analysis of lookup table size
Problems
References
Part V Real Arithmetic
Representing the Real Numbers
Floating-point numbers
The ANSI/IEEE floating-point standard
Floating-point arithmetic operations
Exceptions and other features
Rounding schemes
Logarithmic number systems
Problems
References
Floating-Point Arithmetic
Floating-point adders
Barrel-shifter design
Leading-zeros/ones counting
Rounding and exceptions
Floating-point multipliers
Floating-point dividers
Problems
References
Arithmetic Errors and Error Control
Sources of computational errors
Laws of algebra
Accumulation of errors
Error bounding
Forward error analysis
Backward error analysis
Problems
References
Precise and Certifiable Arithmetic
Higher or lower precision
Exact arithmetic
Variable-precision arithmetic
Interval arithmetic in practice
Lazy arithmetic
Adaptable arithmetic systems
Problems
References
Part VI Function Evaluation
Square-Rooting Methods
The pencil-and-paper algorithm
Shift/subtract square-rooting algorithms
Non-restoring square-rooting
High-radix square-rooting
Square-rooting by convergence
Floating-point square-rooting
Problems
References
The CORDIC Algorithms
Vector rotations and pseudo-rotations
CORDIC hardware
CORDIC hardware
Generalized CORDIC
Using the CORDIC method
An algebraic formulation
Problems
Referencse
Variations in Function Evaluation
Additive/multiplicative normalization
Computing logarithms
Exponentiation
Square-rooting, again
Approximating functions
Merged arithmetic
Problems
References
Arithmetic by Table Lookup
Direct and indirect table lookup
Binary-to-unary reduction
TFLOPS, PFLOPS, and beyond
Interpolating Memory
Tradeoffs in costs, speed, and accuracy
6 Piecewise lookup tables
Problems
References
Part VII Some Broad Topics
High-Throughput Arithmetic
Pipelining of arithmetic functions
Clock rate and throughput
The Earle latch
Parallel and digital-serial problems
On-line or digital-pipelined arithmetic
Systolic arithmetic units
Problems
References
Low-Power Arithmetic
The need for low-power design
Sources of power consumption
Reduction of power waste
Reductin of activity
Transformations and tradeoffs
Some emerging methods
Problems
Refrences
Fault-Tolerant Arithmetic
Faults, errors, and error codes
Arithmetic error-detecting codes
Arithmetic error-correcting codes
Self-checking arithemetic units
Algorithm-based fault tolerance
Fault tolerance with RNS arithmetic
Problems
References
Past, Present, and Future
Historical perspective
An early supercomputer
A modern vector processor
A modern microprocessor
Digital signal processors
Impact of hardware technology
Problems
References
Index
